In thin film transistor liquid crystal displays (TFT LCDs), low-temperature polysilicon (LTPS) technology has advantages such as high resolution, fast response, high brightness and high aperture ratio; with the above advantages, LTPS technology has become one of the development directions of TFT LCD. LTPS technology is relatively complex, resulting in a low product yield of the TFT LCDs adopting LTPS technology. In particular, during the production and use procedure of the TFT LCDs using LTPS technology, static electricity is easily generated. Therefore, in order to improve anti-ESD (Electro-static Discharge, hereinafter to be referred as ESD for short) performance, an ESD circuit is generally provided in a TFT LCD adopting LTPS technology, so as to avoid damage of the TFT LCD due to ESD.
FIG. 1 is a schematic view of an ESD circuit in an existing TFT LCD using LTPS technology. As shown in FIG. 1, the ESD circuit includes a first transistor and a second transistor, a gate G and a drain D of the first transistor are connected to a data line DATA, a source S of the first transistor is connected to a high voltage terminal VDD on the array substrate, and the voltage on the high voltage terminal VDD is the highest positive voltage VGH when the display panel of the TFT LCD operates normally; a source S of the second transistor is connected to the data line DATA, a gate G and a drain D of the second transistor is connected to a low voltage terminal VSS, and the voltage on the low voltage terminal VGL is the lowest negative voltage VGL when the display panel of the TFT LCD operates normally. FIG. 2 shows the structure of the TFT LCD in FIG. 1. As shown in FIG. 2, as for both the first transistor and the second transistor, the source S and the drain D are connected by polysilicon provided on the array substrate, two ends of the polysilicon connecting the source S and the drain D are N-type highly doped, and the polysilicon between the two ends are P-type lightly doped.
In the above TFT LCD, since the gate G and the drain D of the first transistor are connected together, and the gate G and the drain D of the second transistor are connected together, the first transistor and the second transistor are equivalent to two one-way electric conductive diodes. When static electricity is generated so that the voltage on the data line DATA is higher than the highest positive voltage VGH, the first transistor is turned on, the data line DATA is connected to the high voltage terminal VDD, and the voltage on the data line DATA is not higher than the highest positive voltage VGH; when static electricity is generated so that the voltage on the data line DATA is lower than the lowest negative voltage VGL, the second transistor is turned on, the data line DATA is connected to the low voltage terminal VSS and the voltage on the data line DATA is not lower than the lowest negative voltage VGL. When the voltage on the data line DATA is between the highest positive voltage VGH and the lowest negative voltage VGL, the first transistor and the second transistor are turned off so that the high voltage terminal VDD and the low voltage terminal VSS will not affect the voltage on the data line DATA.
In the above TFT LCD, the first transistor and the second transistor, of which the gate G and the drain D are connected together, are equivalent to the one-way electric conductive diodes, which are connected between the data line DATA and the high voltage terminal VDD and between the data line DATA and the low voltage terminal VDD, respectively, and the manufacturing process of the array substrate is not complicated (the first transistor and the second transistor are manufactured together with the thin film transistor in each pixel unit). However, since both the two ends of the polysilicon are N-type highly doped, a large leakage current is generated between the sources S and the drains D of the first transistor and the second transistor, which will cause a high power consumption when the TFT LCD operates.